SHORT  Instruction cache miss rate/ratio

EVENTSET
FIXC0 INSTR_RETIRED_ANY
FIXC1 CPU_CLK_UNHALTED_CORE
FIXC2 CPU_CLK_UNHALTED_REF
FIXC3 TOPDOWN_SLOTS
PMC0  ICACHE_64B_IFTAG_ALL
PMC1  ICACHE_64B_IFTAG_MISS
PMC2  ICACHE_64B_IFTAG_STALL

METRICS
Runtime (RDTSC) [s] time
Runtime unhalted [s] FIXC1*inverseClock
Clock [MHz]  1.E-06*(FIXC1/FIXC2)/inverseClock
CPI  FIXC1/FIXC0
L1I request rate PMC0/FIXC0
L1I miss rate PMC1/FIXC0
L1I miss ratio PMC1/PMC0
L1I stalls PMC2
L1I stall rate PMC2/FIXC0

LONG
Formulas:
L1I request rate = ICACHE_ACCESSES / INSTR_RETIRED_ANY
L1I miss rate = ICACHE_MISSES / INSTR_RETIRED_ANY
L1I miss ratio = ICACHE_MISSES / ICACHE_ACCESSES
L1I stalls = ICACHE_IFETCH_STALL
L1I stall rate = ICACHE_IFETCH_STALL / INSTR_RETIRED_ANY
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This group measures some L1 instruction cache metrics.
