SHORT L2 cache bandwidth in MBytes/s

EVENTSET
FIXC0 INSTR_RETIRED_ANY
FIXC1 CPU_CLK_UNHALTED_CORE
FIXC2 CPU_CLK_UNHALTED_REF
FIXC3 TOPDOWN_SLOTS
PMC0  L1D_REPLACEMENT

METRICS
Runtime (RDTSC) [s] time
Runtime unhalted [s] FIXC1*inverseClock
Clock [MHz]  1.E-06*(FIXC1/FIXC2)/inverseClock
CPI  FIXC1/FIXC0
L2D load bandwidth [MBytes/s]  1.0E-06*PMC0*64.0/time
L2D load data volume [GBytes]  1.0E-09*PMC0*64.0

LONG
Formulas:
L2D load bandwidth [MBytes/s] = 1.0E-06*L1D_REPLACEMENT*64.0/time
L2D load data volume [GBytes] = 1.0E-09*L1D_REPLACEMENT*64.0
-
Profiling group to measure L2 load cache bandwidth. The bandwidth is computed by the
number of cache line allocated/replaced in the L1. There is currently no event to count
L1 to L2 writebacks or L1 instruction cache misses.


