USRP Hardware Driver and USRP Manual: uhd::rfnoc::multichan_register_iface Class Reference

| USRP Hardware Driver and USRP Manual Version: 4.8.0.makepkg-0-g308126a4 UHD and USRP Manual |

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Public Types | Public Member Functions | List of all members
uhd::rfnoc::multichan_register_iface Class Reference

`#include <uhd/rfnoc/multichan_register_iface.hpp>`

## Public Types
using | sptr = std::shared_ptr<multichan_register_iface>

## Public Member Functions
| multichan_register_iface (register_iface_holder &reg_iface_holder, const uint32_t block_base_addr, const size_t block_size)
| ~multichan_register_iface ()=default
void | poke32 (uint32_t addr, uint32_t data, const size_t instance=0, uhd::time_spec_t time=uhd::time_spec_t::ASAP, bool ack=false)
void | poke64 (uint32_t addr, uint64_t data, const size_t instance=0, time_spec_t time=uhd::time_spec_t::ASAP, bool ack=false)
void | multi_poke32 (const std::vector< uint32_t > addrs, const std::vector< uint32_t > data, const size_t instance=0, uhd::time_spec_t time=uhd::time_spec_t::ASAP, bool ack=false)
void | block_poke32 (uint32_t first_addr, const std::vector< uint32_t > data, const size_t instance=0, uhd::time_spec_t time=uhd::time_spec_t::ASAP, bool ack=false)
uint32_t | peek32 (uint32_t addr, const size_t instance=0, time_spec_t time=uhd::time_spec_t::ASAP)
uint64_t | peek64 (uint32_t addr, const size_t instance=0, time_spec_t time=uhd::time_spec_t::ASAP)
std::vector< uint32_t > | block_peek32 (uint32_t first_addr, size_t length, const size_t instance=0, time_spec_t time=uhd::time_spec_t::ASAP)
void | poll32 (uint32_t addr, uint32_t data, uint32_t mask, time_spec_t timeout, const size_t instance=0, time_spec_t time=uhd::time_spec_t::ASAP, bool ack=false)

## Detailed Description

A software interface to access low-level registers in a NoC block, which automatically handles address translation between multiple consecutive instances of the block. (For instance, accessing registers from multiple channels in hardware).

This interface supports the following:

- Writing and reading registers
- Hardware timed delays (for time sequencing operations)

## Member Typedef Documentation

## ◆ sptr

using uhd::rfnoc::multichan_register_iface::sptr = std::shared_ptr<multichan_register_iface>

## Constructor & Destructor Documentation

## ◆ multichan_register_iface()

uhd::rfnoc::multichan_register_iface::multichan_register_iface | ( | register_iface_holder & | reg_iface_holder,
|  | const uint32_t | block_base_addr,
|  | const size_t | block_size )
| inline

## ◆ ~multichan_register_iface()

uhd::rfnoc::multichan_register_iface::~multichan_register_iface | ( |  | ) |
| default

## Member Function Documentation

## ◆ block_peek32()

std::vector< uint32_t > uhd::rfnoc::multichan_register_iface::block_peek32 | ( | uint32_t | first_addr,
|  | size_t | length,
|  | const size_t | instance = 0,
|  | time_spec_t | time = uhd::time_spec_t::ASAP )
| inline

Read multiple 32-bit consecutive registers implemented in the NoC block.

Parameters

  first_addr | The byte address of the first register to read from (truncated to 20 bits).
  length | The number of 32-bit values to read
  instance | The index of the block of registers to which the reads apply.
  time | The time at which the transaction should be executed.

Returns
  data New value of this register.

Example: If `first_addr` is set to 0, and length is 8, then this function will return a vector of length 8, with the content of registers at addresses 0, 4, 8, 12, 16, 20, 24, and 28 respectively.

Note: There is no guarantee that under the hood, the implementation won't separate the reads.

Exceptions

  op_failed | if the transaction fails
  op_timeout | if no response is received
  op_seqerr | if a sequence error occurs

## ◆ block_poke32()

void uhd::rfnoc::multichan_register_iface::block_poke32 | ( | uint32_t | first_addr,
|  | const std::vector< uint32_t > | data,
|  | const size_t | instance = 0,
|  | uhd::time_spec_t | time = uhd::time_spec_t::ASAP,
|  | bool | ack = false )
| inline

Write multiple consecutive 32-bit registers implemented in the NoC block.

This function will only allow writes to adjacent registers, in increasing order. If addr is set to 0, and the length of data is 8, then this method triggers eight writes, in order, to addresses 0, 4, 8, 12, 16, 20, 24, 28. For arbitrary addresses, cf. multi_poke32().

Note: There is no guarantee that under the hood, the implementation won't separate the writes.

Parameters

  first_addr | The byte addresses of the first register to write
  data | New values of these registers
  instance | The index of the block of registers to which the writes apply.
  time | The time at which the first transaction should be executed.
  ack | Should transaction completion be acknowledged?

Exceptions

  op_failed | if an ACK is requested and the transaction fails
  op_timeout | if an ACK is requested and no response is received
  op_seqerr | if an ACK is requested and a sequence error occurs
  op_timeerr | if an ACK is requested and a time error occurs (late command)

## ◆ multi_poke32()

void uhd::rfnoc::multichan_register_iface::multi_poke32 | ( | const std::vector< uint32_t > | addrs,
|  | const std::vector< uint32_t > | data,
|  | const size_t | instance = 0,
|  | uhd::time_spec_t | time = uhd::time_spec_t::ASAP,
|  | bool | ack = false )
| inline

Write multiple 32-bit registers implemented in the NoC block.

This method should be called when multiple writes need to happen that are at non-consecutive addresses. For consecutive writes, cf. block_poke32().

Parameters

  addrs | The byte addresses of the registers to write to (each truncated to 20 bits).
  data | New values of these registers. The lengths of data and addr must match.
  instance | The index of the block of registers to which the writes apply.
  time | The time at which the first transaction should be executed.
  ack | Should transaction completion be acknowledged?

Exceptions

  uhd::value_error | if lengths of data and addr don't match
  op_failed | if an ACK is requested and the transaction fails
  op_timeout | if an ACK is requested and no response is received
  op_seqerr | if an ACK is requested and a sequence error occurs
  op_timeerr | if an ACK is requested and a time error occurs (late command)

## ◆ peek32()

uint32_t uhd::rfnoc::multichan_register_iface::peek32 | ( | uint32_t | addr,
|  | const size_t | instance = 0,
|  | time_spec_t | time = uhd::time_spec_t::ASAP )
| inline

Read a 32-bit register implemented in the NoC block.

Parameters

  addr | The byte address of the register to read from (truncated to 20 bits).
  instance | The index of the block of registers to which the read applies.
  time | The time at which the transaction should be executed.

Exceptions

  op_failed | if the transaction fails
  op_timeout | if no response is received
  op_seqerr | if a sequence error occurs

## ◆ peek64()

uint64_t uhd::rfnoc::multichan_register_iface::peek64 | ( | uint32_t | addr,
|  | const size_t | instance = 0,
|  | time_spec_t | time = uhd::time_spec_t::ASAP )
| inline

Read two consecutive 32-bit registers implemented in the NoC block and return them as one 64-bit value.

Note: This is a convenience call, because all register peeks are 32-bits. This will concatenate two peeks in a block peek, and then return the combined result of the two peeks.

Parameters

  addr | The byte address of the lower 32-bit register to read from (truncated to 20 bits).
  instance | The index of the block of registers to which the reads apply.
  time | The time at which the transaction should be executed.

Exceptions

  op_failed | if the transaction fails
  op_timeout | if no response is received
  op_seqerr | if a sequence error occurs

## ◆ poke32()

void uhd::rfnoc::multichan_register_iface::poke32 | ( | uint32_t | addr,
|  | uint32_t | data,
|  | const size_t | instance = 0,
|  | uhd::time_spec_t | time = uhd::time_spec_t::ASAP,
|  | bool | ack = false )
| inline

Write a 32-bit register implemented in the NoC block.

Parameters

  addr | The byte address of the register to write to (truncated to 20 bits).
  data | New value of this register.
  instance | The index of the block of registers to which the write applies
  time | The time at which the transaction should be executed.
  ack | Should transaction completion be acknowledged?

Exceptions

  op_failed | if an ACK is requested and the transaction fails
  op_timeout | if an ACK is requested and no response is received
  op_seqerr | if an ACK is requested and a sequence error occurs
  op_timeerr | if an ACK is requested and a time error occurs (late command)

## ◆ poke64()

void uhd::rfnoc::multichan_register_iface::poke64 | ( | uint32_t | addr,
|  | uint64_t | data,
|  | const size_t | instance = 0,
|  | time_spec_t | time = uhd::time_spec_t::ASAP,
|  | bool | ack = false )
| inline

Write two consecutive 32-bit registers implemented in the NoC block from one 64-bit value.

Note: This is a convenience call, because all register pokes are 32-bits. This will concatenate two pokes in a block poke, and then return the combined result of the two pokes.

Parameters

  addr | The byte address of the lower 32-bit register to read from (truncated to 20 bits).
  data | New value of the register(s).
  instance | The index of the block of registers to which the writes apply.
  time | The time at which the transaction should be executed.
  ack | Should transaction completion be acknowledged?

Exceptions

  op_failed | if the transaction fails
  op_timeout | if no response is received
  op_seqerr | if a sequence error occurs

## ◆ poll32()

void uhd::rfnoc::multichan_register_iface::poll32 | ( | uint32_t | addr,
|  | uint32_t | data,
|  | uint32_t | mask,
|  | time_spec_t | timeout,
|  | const size_t | instance = 0,
|  | time_spec_t | time = uhd::time_spec_t::ASAP,
|  | bool | ack = false )
| inline

Poll a 32-bit register until its value for all bits in mask match data&mask

This will insert a command into the command queue to wait until a register is of a certain value. This can be used, e.g., to poll for a lock pin before executing the next command. It is related to sleep(), except it has a condition to wait on, rather than an unconditional stall duration. The timeout is hardware-timed. If the register does not attain the requested value within the requested duration, ${something bad happens}.

Example: Assume readback register 16 is a status register, and bit 0 indicates a lock is in place (i.e., we want it to be 1) and bit 1 is an error flag (i.e., we want it to be 0). The previous command can modify the state of the block, so we give it 1ms to settle. In that case, the call would be thus:

// iface is a multichan_register_iface::sptr:
iface->poll32(16, 0x1, 0x3, 1e-3);

Parameters

  addr | The byte address of the register to read from (truncated to 20 bits).
  data | The values that the register must have
  mask | The bitmask that is applied before checking the readback value
  timeout | The max duration that the register is allowed to take before reaching its new state.
  instance | The index of the block of registers to which the poll applies.
  time | When the poll should be executed
  ack | Should transaction completion be acknowledged? This is typically only necessary if the software needs a condition to be fulfilled before continueing, or during debugging.

Exceptions

  op_failed | if an ACK is requested and the transaction fails
  op_timeout | if an ACK is requested and no response is received
  op_seqerr | if an ACK is requested and a sequence error occurs
  op_timeerr | if an ACK is requested and a time error occurs (late command)

The documentation for this class was generated from the following file:

- multichan_register_iface.hpp